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ADM1191
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Data Sheet
VCC 1
10 ALERTB
SENSE 2
CONV 3
GND 4
SETV 5
ADM1191
TOP VIEW
(Not to Scale)
9
8
7
6
A1
A0
SDA
SCL
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
Mnemonic
VCC
SENSE
CONV
GND
SETV
SCL
SDA
A0
A1
ALERTB
Description
Positive Supply Input Pin. The operating supply voltage range is from 3.15 V to 26 V. An undervoltage lockout
(UVLO) circuit resets the ADM1191 when a low supply voltage is detected.
Current Sense Input Pin. A sense resistor between the VCC pin and the SENSE pin generates a voltage across
a sense resistor. This voltage is proportional to the load current. A current sense amplifier amplifies this
voltage before it is digitized by the ADC.
Convert Start Pin. A high level on this pin enables an ADC conversion. The state of an internal control register,
which is set through the I 2 C interface, configures the part to convert current only, voltage only, or both
channels when the convert pin is asserted. If not required, this pin should be tied high to allow ADC to run.
Chip Ground Pin.
Input Pin. The voltage driven onto this pin is compared with the output of the internal current sense amplifier.
The lower the voltage on the SETV, the lower the current level that causes the ALERTB output to assert.
Typical response time is 1 μs to 2 μs.
I 2 C Clock Pin. Open-drain input; requires an external resistive pull-up.
I 2 C Data I/O Pin. Open-drain input/output; requires an external resistive pull-up.
I 2 C Address Pin. This pin can be tied low, tied high, left floating, or tied low through a resistor. Sixteen I 2 C
address options are available, depending on the external configuration of the A0 pin and the A1 pin.
I 2 C Address Pin. This pin can be tied low, tied high, left floating, or tied low through a resistor. Sixteen I 2 C
address options are available, depending on the external configuration of the A0 pin and the A1 pin.
Alert Output Pin. Active low, open-drain configuration. This pin asserts low when an overcurrent condition is
present. The level at which an overcurrent condition is detected depends on either the voltage on the SETV
pin or the value in the ALERT_TH register. The ALERT_EN register will determine which is used in the
comparison. This pin has a latching function and should be cleared manually using the ALERT_EN register.
Rev. C | Page 6 of 16
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